Configuration of Phase Fractional Dividers

更新时间 2016-07-27

The i.MX 6 series has several phase-locked loops (PLLs) used for clock generation. Certain PLLs also support phase fractional dividers (PFDs) to generate additional clock outputs. The use of these PFD clock ...

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英文文档 Configuration of Phase Fractional Dividers pdf REV 0 243.36KB 147