更新时间 2016-08-29
This application note describes the maximum memory bus frequency of a low power memory system in terms of stability, capacitive loading, and production margin. This data will be useful to customers in their design of low ...
类型 | 文档标题 | 格式 | 版本 | 文件大小 | 下载次数 |
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英文文档 | High Speed Layout Design Guidelines for i.MX | REV 2 | 657.55KB | 359 |