Potential Signal Race in the CMOS Sensor Interface Module

更新时间 2016-08-31

This document describes about the potential signal race situation in the CSI. This happens in between HSYNC and PIXCLK, when there is a poor routing in the PCB layout. In case the race situation is triggered, an invalid ...

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英文文档 Potential Signal Race in the CMOS Sensor Interface Module pdf REV 2 133.88KB 575