[i.MX RT1021核心板]开发之一：开发板硬件测评

mameng

    NXP i.MX RT系列跨界处理器系列分为3个系列，RT1020，RT1050以及RT1060，RT1060与RT1050的区别在于集成的储存器大小，在功能上并无太大差别，而RT1020则在图像显示/处理功能上有所阉割，所以，对于不需要LCD/CSI等图形显示、图形加速处理的方案来说，RT1020会性价比最高了。
   i.MX RT1021核心板搭载NXP MIMXRT1021DAG5A。

   


The i.MX RT1020 processors 功能强大，资源官方面描述如下：
• Supports single Arm Cortex-M7 with:
— 16 KB L1 Instruction Cache
— 16 KB L1 Data Cache
— Full featured Floating Point Unit (FPU) with support of the VFPv5 architecture
— Support the Armv7-M Thumb instruction set
• Integrated MPU, up to 16 individual protection regions
• Up to 256 KB I-TCM and D-TCM in total
• Target frequency of 396 MHz
• Cortex M7 CoreSight™ components integration for debug
• Frequency of the core, as per Table 11, "Operating ranges," on page 19.
The SoC-level memory system consists of the following additional components:
— Boot ROM (96 KB)
— On-chip RAM (256 KB)
– Configurable RAM size up to 256 KB shared with CM7 TCM
• External memory interfaces:
— 8/16-bit SDRAM, up to SDRAM-133
— 8/16-bit SLC NAND FLASH, with ECC handled in software
— SD/eMMC
— SPI NOR FLASH
— Parallel NOR FLASH with XIP support
— Single/Dual channel Quad SPI FLASH with XIP support
• Timers and PWMs:
— Two General Programmable Timers
– 4-channel generic 32-bit resolution timer
– Each support standard capture and compare operation
— Four Periodical Interrupt Timers
– Generic 32-bit resolution timer
– Periodical interrupt generation

— Two Quad Timers
– 4-channel generic 16-bit resolution timer each
– Each support standard capture and compare operation
– Quadrature decoder integrated
— Two FlexPWMs
– Up to 12 individual PWM channels per each
– 16-bit resolution PWM suitable for Motor Control applications
— Two Quadrature Encoders/Decoders
Each i.MX RT1020 processor enables the following interfaces to external devices (some of them are
muxed and not available simultaneously):
• Audio:
— S/PDIF input and output
— Three synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, and
codec/DSP interfaces
— MQS interface for medium quality audio via GPIO pads
• Connectivity:
— One USB 2.0 OTG controller with integrated PHY interface
— Two Ultra Secure Digital Host Controller (uSDHC) interfaces
– MMC 4.5 compliance support up to 100 MB/sec
– SD/SDIO 3.0 compliance with 200 MHz SDR signaling to support up to 100 MB/sec
– Support for SDXC (extended capacity)
— One 10/100 M Ethernet controller with IEEE1588 supported
— Eight universal asynchronous receiver/transmitter (UARTs) modules
— Four I2C modules
— Four SPI modules
— Two FlexCAN modules
• GPIO and Pin Multiplexing:
— General-purpose input/output (GPIO) modules with interrupt capability
— Input/output multiplexing controller (IOMUXC) to provide centralized pad control
— 96 GPIOs for 144-pin LQFP p





开发板硬件资源：24M晶振，RTC晶振


RT1021内部没有flash，因此核心板上连接了一个flash芯片用于存储程序，核心板上的flash芯片仅用于存储程序。


电源USB电路：

开发板所有引脚引出，麻雀虽小，五脏俱全~~

阅读全文