keil kinetis 问题

liujt_7

e2448:FMC: Flash prefetch could result in incorrect read data
Errata type: Errata
Description: A flash read access could result in incorrect data being returned if the SIM_DIV1 register is
written to change the divide value for the flash clock and a flash prefetch occurs during the
clock change sequence.
Workaround:1. Create a function in the SRAM that performs the following operations:
a. Save value of FMC_PFAPR[23:16].
b. Disable flash prefetching by writing 8’hff to FMC_PFAPR[23:16].
c. Change value of flash divider SIM_DIV1[OUTDIV4].
d. Wait for clock change.
e. Re-enable flash prefetching by restoring the saved FMC_PFACR[23:16] value.
f. Return from the function.
2. Call the SRAM code function.
3. Once the function returns from its SRAM execution, the flash clock divider has been safely
altered.
 
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
  SIM->CLKDIV1 = (uint32_t)0x00110000u; /* Update system prescalers */
 
keil中没有到ram里去分频啊，而是直接在flash里分频了

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kap

如果你不改flash clock divider的话，就当没看到这个errata。
另外，如果你要改变MCG mode的话，请在切换到PLL模式或FLL模式之前更改clock divider这个寄存器。
如果一定要改flash clock divider，若KEIL wizard新建的工程没有把更改代码放到ram中运行，请自行更改代码。