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各位高手,本人调试K10dx64的板子时,使用Kei4软件新建一个k10的工程,也使用了ARM提供的初始化代码,现在可以使用内部的时钟裸奔,但是想用外部8MHz的晶振,但是配置总是有问题,运行不了,求助高手指导。
引用ARM提供的初始化代码如下:
#define CLOCK_SETUP 1
/* Predefined clock setups
0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode
Reference clock source for MCG module is the slow internal clock source 32.768kHz
Core clock = 41.94MHz, BusClock = 41.94MHz
1 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
Reference clock source for MCG module is an external crystal 8MHz
Core clock = 48MHz, BusClock = 48MHz
2 ... Multipurpose Clock Generator (MCG) in Bypassed Low Power External (BLPE) mode
Core clock/Bus clock derived directly from an external crystal 8MHz with no multiplication
Core clock = 8MHz, BusClock = 8MHz
*/
/*----------------------------------------------------------------------------
Define clock source values
*----------------------------------------------------------------------------*/
#if (CLOCK_SETUP == 0)
#define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
#define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
#define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
#define DEFAULT_SYSTEM_CLOCK 41943040u /* Default System clock value */
#elif (CLOCK_SETUP == 1)
#define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
#define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
#define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
#define DEFAULT_SYSTEM_CLOCK 48000000u /* Default System clock value */
#elif (CLOCK_SETUP == 2)
#define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
#define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
#define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
#define DEFAULT_SYSTEM_CLOCK 8000000u /* Default System clock value */
#endif /* (CLOCK_SETUP == 2) */
/* ----------------------------------------------------------------------------
-- Core clock
---------------------------------------------------------------------------- */
uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
/* ----------------------------------------------------------------------------
-- SystemInit()
---------------------------------------------------------------------------- */
void SystemInit (void) {
/* Switch to FBE Mode */
/* OSC->CR: ERCLKEN=0,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
OSC0->CR = (uint8_t)0x00u;
/* SIM->SOPT2: MCGCLKSEL=0 */
SIM->SOPT2 &= (uint8_t)~(uint8_t)0x01u;
/* MCG->C2: ??=0,??=0,RANGE=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
MCG->C2 = (uint8_t)0x24u;
/* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = (uint8_t)0x9Au;
/* MCG->C4: DMX32=0,DRST_DRS=0 */
MCG->C4 &= (uint8_t)~(uint8_t)0xE0u;
/* MCG->C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV=3 */
MCG->C5 = (uint8_t)0x03u;
/* MCG->C5: PLLCLKEN=1 */
MCG->C5 |= (uint8_t)0x40u; /* Enable the PLL */
/* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV=0 */
MCG->C6 = (uint8_t)0x00u;
while((MCG->S & MCG_S_OSCINIT0_MASK) == 0u) { /* Check that the oscillator is running */总是卡住这里,请问指导!
}
while((MCG->S & MCG_S_IREFST_MASK) != 0u) { /* Check that the source of the FLL reference clock is the external reference clock. */
}
while((MCG->S & 0x0Cu) != 0x08u) { /* Wait until external reference clock is selected as MCG output */
}
/* Switch to PBE Mode */
/* MCG->C1: CLKS=2,FRDIV=0,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = (uint8_t)0x82u;
/* MCG->C6: LOLIE=0,PLLS=1,CME=0,VDIV=0 */
MCG->C6 = (uint8_t)0x40u;
/* Switch to PEE Mode */
/* MCG->C1: CLKS=0,FRDIV=0,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = (uint8_t)0x02u;
/* MCG->C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV=3 */
MCG->C5 = (uint8_t)0x03u;
/* MCG->C6: LOLIE=0,PLLS=1,CME=0,VDIV=0 */
MCG->C6 = (uint8_t)0x40u;
while((MCG->S & 0x0Cu) != 0x0Cu) { /* Wait until output of the PLL is selected */
}
while((MCG->S & MCG_S_LOCK_MASK) == 0u) { /* Wait until locked */
}
/* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM->CLKDIV1 = (uint32_t)0x00110000u; /* Update system prescalers */
}
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