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[MPC] MPC5634-dma读取ADC的采样结果 读不出来

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1970-1-1
发表于 2013-9-29 09:33:05 | 显示全部楼层 |阅读模式
朋友看看,这个程序用DMA读取ADC的结果,读不出来?望版主和大神们指导?
程序如下:
#include "MPC5634M_MLQB80.h"
#define CFIFO0_PUSH 0xFFF80010
#define RFIFO0_POP 0xFFF80032

static vuint32_t CQUEUE0[4];  // CFIFO 0 Queue Variable declaration
static vuint32_t RQUEUE0[12];  // RFIFO 0 Queue Variable declaration
static vuint16_t Result[4];
void dma_init_fcn(void);
void eqadc_init_fcn(void);
// ********************* Initialization Function *********************
void dma_init_fcn(void)
{
  EDMA.CR.R = 0x0000E400;   // Group Arbitration scheme is: Fixed Priority 
     EDMA.ERQRL.R = 0x0000000F;   // DMA Enable Request Register Low  (Channels 0-31)
  EDMA.EEIRL.R = 0x00000000;   // DMA Error Interrupt Enable Register Low (Channels 0-31)

 
 
// Transfer Control Descriptor for RFIFO 00 - CH1 
  EDMA.TCD[1].SADDR = RFIFO0_POP;   // Start Address
  EDMA.TCD[1].DADDR = (vuint32_t) &Result;  // Destination address
  EDMA.TCD[1].SMOD = 0x00;    // Source address modulo
  EDMA.TCD[1].DMOD = 0x00;    // Destination address modulo \
  EDMA.TCD[1].DSIZE = 0x01;    // Destination transfer size: 16 Bits
  EDMA.TCD[1].SSIZE = 0x01;    // Source transfer size: 16 Bits
  EDMA.TCD[1].SOFF = 0x00;    // Signed source address offset
  EDMA.TCD[1].NBYTES = 0x2;   // Inner "minor" byte count
  EDMA.TCD[1].SLAST = 0x0;    // Last Signed source address adjust
  EDMA.TCD[1].DOFF = 0x2;    // Signed destination address offset
  EDMA.TCD[1].DLAST_SGA = -8;   // Signed destination address adjust
  EDMA.TCD[1].BITER = 0x0004;    // beginning "major" iteration count
  EDMA.TCD[1].CITER=0x0004;    // Current "major" iteration count Disabled
  EDMA.TCD[1].BWC = 0x00;    // Bandwidth control: No DMA Stalls
  EDMA.TCD[1].MAJORLINKCH = 0x00;   // Major Channel number
  EDMA.TCD[1].MAJORE_LINK = 0x0;   // Major Channel Link: Disabled
  EDMA.TCD[1].DONE = 0x00;    // Channel Done
  EDMA.TCD[1].ACTIVE = 0x00;    // Channel ACtive
  EDMA.TCD[1].E_SG = 0x0;    // Enable Scatter/Gather: Disabled
  EDMA.TCD[1].D_REQ = 0x0;    // Disables the DMA Channel when done
  EDMA.TCD[1].INT_HALF = 0x0;    // Interrupt on minor loop count: Disabled
  EDMA.TCD[1].INT_MAJ = 0x0;    // Interrupt on major loop completion: Disabled
  EDMA.TCD[1].START = 0x00;    // Explicit Channel Start bit
  }
void eqadc_init_fcn(void)
{
  EQADC.MCR.R = 0x00000000;   // EQADC SSI is Disabled and Debug Mode Disabled
 
    EQADC.NMSFR.R = 0x0000000;   // Null Message Format
    EQADC.ETDFR.R = 0x00000000;  // Digital Filter Length = 2
    EQADC.CFCR[0].R = 0x0010;   // Single Scan Enable Bit - 0
         
    EQADC.IDCR[0].R = 0x0000;   // Non-coherency Interrupt is: (0) 
     
    EQADC.CFPR[0].B.CFPUSH = 0x00000802; // Initialize the Time Stamp Control Reg 0
    EQADC.CFPR[0].B.CFPUSH = 0x00000003; // Initialize the Time Base Counter Register 0
 
    EQADC.CFPR[0].B.CFPUSH = 0x00801F01; // Initialize the ADC Control Register 0
    EQADC.CFPR[0].B.CFPUSH = 0x82801F01; // Initialize the ADC Control Register 1
    EQADC.CFCR[0].B.SSE = 0x01;  // Trigger the CFIFO0 to configure ADCx's
 while(EQADC.CFSR.B.CFS0 == 0x3) // Wait for Triggered State to end so
     // we know queue is done.
{}
    EQADC.FISR[0].B.EOQF = 0x01; // Clear the end of queue flag for the configuration
     // command sets.
    EQADC.CFCR[0].R = 0x0000;   // Disable the queue in preparation for queue mode change.
 
 while(EQADC.CFSR.B.CFS0 != 0x0) // Wait for queue to go to IDLE before  
     // setting mode to user setting.
{}
// EQADC Interrupt and DMA Control Registers (EQADC_IDCR) IDCR0
    EQADC.IDCR[0].R = 0x0003;   // NonCoherency Interrupt is: Disabled (0) 
      EQADC.CFCR[0].R = 0x0010;   // Single Scan Enable Bit - 0
     // CFIFO Invalidate Bit -0
     // CFIFO Operation Mode - Software Trigger
     // Trigger - Single Scan Mode
}
void main (void)
{ vuint32_t j=0;
vuint16_t i=0;

    dma_init_fcn();
     eqadc_init_fcn();
    
     while(j
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    发表于 2013-10-10 16:23:29 | 显示全部楼层

    RE:MPC5634-dma读取ADC的采样结果 读不出来

    没用过MPC系列的,只能帮你找找对应的例程了。
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