imx6q-sdp LPDDR2内存寄存器的配置（已解决）

xbk20082008 · 发表于 2014-5-5 12:53:05

Freescale imx6q-sdp的评估板自带2Gb_1_35V_DDR3L（MT41K128M16JT）的内存，
现在想移植用LPDDR2（MT42L256M32D2LG-18WT），在flash_header.S中如何配置修改寄存器？（内存大小为2G）

以下为评估板自带的flash_header.S中关于DDR3配置的部分。

/* i.MX6Q */
dcd_hdr: .word 0x40a002D2 /* Tag=0xD2, Len=83*8 + 4 + 4, Ver=0x40 */
write_dcd_cmd: .word 0x049c02CC /* Tag=0xCC, Len=83*8 + 4, Param=0x04 */

/* DCD */
MXC_DCD_ITEM(1, IOMUXC_BASE_ADDR + 0x798, 0x000C0000)
MXC_DCD_ITEM(2, IOMUXC_BASE_ADDR + 0x758, 0x00000000)

MXC_DCD_ITEM(3, IOMUXC_BASE_ADDR + 0x588, 0x00000030)
MXC_DCD_ITEM(4, IOMUXC_BASE_ADDR + 0x594, 0x00000030)

MXC_DCD_ITEM(5, IOMUXC_BASE_ADDR + 0x56c, 0x00000030)
MXC_DCD_ITEM(6, IOMUXC_BASE_ADDR + 0x578, 0x00000030)
MXC_DCD_ITEM(7, IOMUXC_BASE_ADDR + 0x74c, 0x00000030)

MXC_DCD_ITEM(8, IOMUXC_BASE_ADDR + 0x57c, 0x00000030)

MXC_DCD_ITEM(9, IOMUXC_BASE_ADDR + 0x58c, 0x00000000)
MXC_DCD_ITEM(10, IOMUXC_BASE_ADDR + 0x59c, 0x00000030)
MXC_DCD_ITEM(11, IOMUXC_BASE_ADDR + 0x5a0, 0x00000030)
MXC_DCD_ITEM(12, IOMUXC_BASE_ADDR + 0x78c, 0x00000030)

MXC_DCD_ITEM(13, IOMUXC_BASE_ADDR + 0x750, 0x00020000)

MXC_DCD_ITEM(14, IOMUXC_BASE_ADDR + 0x5a8, 0x00000030)
MXC_DCD_ITEM(15, IOMUXC_BASE_ADDR + 0x5b0, 0x00000030)
MXC_DCD_ITEM(16, IOMUXC_BASE_ADDR + 0x524, 0x00000030)
MXC_DCD_ITEM(17, IOMUXC_BASE_ADDR + 0x51c, 0x00000030)
MXC_DCD_ITEM(18, IOMUXC_BASE_ADDR + 0x518, 0x00000030)
MXC_DCD_ITEM(19, IOMUXC_BASE_ADDR + 0x50c, 0x00000030)
MXC_DCD_ITEM(20, IOMUXC_BASE_ADDR + 0x5b8, 0x00000030)
MXC_DCD_ITEM(21, IOMUXC_BASE_ADDR + 0x5c0, 0x00000030)

MXC_DCD_ITEM(22, IOMUXC_BASE_ADDR + 0x774, 0x00020000)

MXC_DCD_ITEM(23, IOMUXC_BASE_ADDR + 0x784, 0x00000030)
MXC_DCD_ITEM(24, IOMUXC_BASE_ADDR + 0x788, 0x00000030)
MXC_DCD_ITEM(25, IOMUXC_BASE_ADDR + 0x794, 0x00000030)
MXC_DCD_ITEM(26, IOMUXC_BASE_ADDR + 0x79c, 0x00000030)
MXC_DCD_ITEM(27, IOMUXC_BASE_ADDR + 0x7a0, 0x00000030)
MXC_DCD_ITEM(28, IOMUXC_BASE_ADDR + 0x7a4, 0x00000030)
MXC_DCD_ITEM(29, IOMUXC_BASE_ADDR + 0x7a8, 0x00000030)
MXC_DCD_ITEM(30, IOMUXC_BASE_ADDR + 0x748, 0x00000030)

MXC_DCD_ITEM(31, IOMUXC_BASE_ADDR + 0x5ac, 0x00000030)
MXC_DCD_ITEM(32, IOMUXC_BASE_ADDR + 0x5b4, 0x00000030)
MXC_DCD_ITEM(33, IOMUXC_BASE_ADDR + 0x528, 0x00000030)
MXC_DCD_ITEM(34, IOMUXC_BASE_ADDR + 0x520, 0x00000030)
MXC_DCD_ITEM(35, IOMUXC_BASE_ADDR + 0x514, 0x00000030)
MXC_DCD_ITEM(36, IOMUXC_BASE_ADDR + 0x510, 0x00000030)
MXC_DCD_ITEM(37, IOMUXC_BASE_ADDR + 0x5bc, 0x00000030)
MXC_DCD_ITEM(38, IOMUXC_BASE_ADDR + 0x5c4, 0x00000030)

MXC_DCD_ITEM(39, MMDC_P0_BASE_ADDR + 0x800, 0xA1390003)

MXC_DCD_ITEM(40, MMDC_P0_BASE_ADDR + 0x80c, 0x001F001F)
MXC_DCD_ITEM(41, MMDC_P0_BASE_ADDR + 0x810, 0x001F001F)
MXC_DCD_ITEM(42, MMDC_P1_BASE_ADDR + 0x80c, 0x001F001F)
MXC_DCD_ITEM(43, MMDC_P1_BASE_ADDR + 0x810, 0x001F001F)

MXC_DCD_ITEM(44, MMDC_P0_BASE_ADDR + 0x83c, 0x4333033F)
MXC_DCD_ITEM(45, MMDC_P0_BASE_ADDR + 0x840, 0x032C031D)
MXC_DCD_ITEM(46, MMDC_P1_BASE_ADDR + 0x83c, 0x43200332)
MXC_DCD_ITEM(47, MMDC_P1_BASE_ADDR + 0x840, 0x031A026A)
MXC_DCD_ITEM(48, MMDC_P0_BASE_ADDR + 0x848, 0x4D464746)
MXC_DCD_ITEM(49, MMDC_P1_BASE_ADDR + 0x848, 0x47453F4D)
MXC_DCD_ITEM(50, MMDC_P0_BASE_ADDR + 0x850, 0x3E434440)
MXC_DCD_ITEM(51, MMDC_P1_BASE_ADDR + 0x850, 0x47384839)

MXC_DCD_ITEM(52, MMDC_P0_BASE_ADDR + 0x81c, 0x33333333)
MXC_DCD_ITEM(53, MMDC_P0_BASE_ADDR + 0x820, 0x33333333)
MXC_DCD_ITEM(54, MMDC_P0_BASE_ADDR + 0x824, 0x33333333)
MXC_DCD_ITEM(55, MMDC_P0_BASE_ADDR + 0x828, 0x33333333)
MXC_DCD_ITEM(56, MMDC_P1_BASE_ADDR + 0x81c, 0x33333333)
MXC_DCD_ITEM(57, MMDC_P1_BASE_ADDR + 0x820, 0x33333333)
MXC_DCD_ITEM(58, MMDC_P1_BASE_ADDR + 0x824, 0x33333333)
MXC_DCD_ITEM(59, MMDC_P1_BASE_ADDR + 0x828, 0x33333333)

MXC_DCD_ITEM(60, MMDC_P0_BASE_ADDR + 0x8b8, 0x00000800)
MXC_DCD_ITEM(61, MMDC_P1_BASE_ADDR + 0x8b8, 0x00000800)

MXC_DCD_ITEM(62, MMDC_P0_BASE_ADDR + 0x004, 0x00020036)
MXC_DCD_ITEM(63, MMDC_P0_BASE_ADDR + 0x008, 0x09444040)
MXC_DCD_ITEM(64, MMDC_P0_BASE_ADDR + 0x00c, 0x555A7975)
MXC_DCD_ITEM(65, MMDC_P0_BASE_ADDR + 0x010, 0xFF538F64)
MXC_DCD_ITEM(66, MMDC_P0_BASE_ADDR + 0x014, 0x01FF00DB)
MXC_DCD_ITEM(67, MMDC_P0_BASE_ADDR + 0x018, 0x00001740)

MXC_DCD_ITEM(68, MMDC_P0_BASE_ADDR + 0x01c, 0x00008000)
MXC_DCD_ITEM(69, MMDC_P0_BASE_ADDR + 0x02c, 0x000026D2)
MXC_DCD_ITEM(70, MMDC_P0_BASE_ADDR + 0x030, 0x005A1023)
MXC_DCD_ITEM(71, MMDC_P0_BASE_ADDR + 0x040, 0x00000027)

MXC_DCD_ITEM(72, MMDC_P0_BASE_ADDR + 0x000, 0x831A0000)

MXC_DCD_ITEM(73, MMDC_P0_BASE_ADDR + 0x01c, 0x04088032)
MXC_DCD_ITEM(74, MMDC_P0_BASE_ADDR + 0x01c, 0x00008033)
MXC_DCD_ITEM(75, MMDC_P0_BASE_ADDR + 0x01c, 0x00048031)
MXC_DCD_ITEM(76, MMDC_P0_BASE_ADDR + 0x01c, 0x09408030)
MXC_DCD_ITEM(77, MMDC_P0_BASE_ADDR + 0x01c, 0x04008040)

MXC_DCD_ITEM(78, MMDC_P0_BASE_ADDR + 0x020, 0x00005800)

MXC_DCD_ITEM(79, MMDC_P0_BASE_ADDR + 0x818, 0x00011117)
MXC_DCD_ITEM(80, MMDC_P1_BASE_ADDR + 0x818, 0x00011117)

MXC_DCD_ITEM(81, MMDC_P0_BASE_ADDR + 0x004, 0x00025576)
MXC_DCD_ITEM(82, MMDC_P0_BASE_ADDR + 0x404, 0x00011006)
MXC_DCD_ITEM(83, MMDC_P0_BASE_ADDR + 0x01c, 0x00000000)

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