K60F120M demo I2S/SAI in 48kHz/24bit

FSL_FAE_allan · 发表于 2014-7-23 09:47:19

I build an platform by using TWR-K60F120M(Rev.C ) with my own CODEC board, connected with wire from TWR's female header A21~A25( I2S signal and clock), my system are CW10.6 and MQX4.1.

I tested the "i2s_demo" under "mqx" subfolder, insert a microSD card including a 48kHz/24bit stereo wav file then download the project. when I type play command on shell, I can see the wav file is playing well on console( there are some error message stop on "initial_codec" and "setup_codec", so I commented them out to pass it), but the clock signal are not correct. so I change "CLK_MULT" from 384 to 256 then I could measure that MCLK = 12.288MHz and BCLK = 3.072MHz( system use EXTAL_MAIN 50MHZ by default, jumper J18 on and J6 off), that's what I need but LRCK is 64kHz, it's very weird because I had checked the wav file header and played by some audio player, the sample rate is 48kHz, but sample rate on shell message is 51200Hz, and 64000Hz on LRCK pin as I mentioned earlier.

When I played a sound file A.wav(48kHz/16bit-stereo), the I2S clock are MCLK = 12.288MHz' SCLK = 1.536MHz' LRCK = 48kHz, and playback information on shell displays 48000Hz, it plays no problem; but when I play a sound file B.wav(48kHz/24bit-stereo), the I2S clock are MCLK = 12.288MHz' SCLK = 3.072MHz' LRCK = 64kHz, and playback information on shell displays 51200Hz, it's very strange because 1536/48 is not equal to 3072/64, It's hard to realize how system can get these value, especially 51200 on shell.

And Finally I found LRCK is controlled by 4 parameters: SYWD in TCR4, WNW' W0W and FBT in TCR5, but it's hard to understand how it works.

Is there anybody know how to control LRCK? 48kHz/24bit format is the only one I use!

我知道答案目前已有5人回答

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洛兮 · 发表于 2014-7-23 09:54:02

我表示我英语很差

FSL_TICS_ZP · 发表于 2014-7-23 13:58:34

Hi Allan,
I've had a brief look through your question and it seems a little complicated.
So I'd like to suggest that you could create Service Request for tech support and please refer to this tip as follow to create Service Request.
Sorry for bringing any inconvenience to you.
https://www.nxpic.org.cn/bbs/article_1280_578569.html

有缘于你 · 发表于 2014-7-23 18:06:38

I2S最大也就是48khz吧

no1ed525 · 发表于 2014-7-24 15:16:23

我作過類似的測試，是用TWR-K60F120M(Rev.C )搭配TWR-AUDIO-SGTL，系統時脈為開發板上預設的EXTAL_MAIN 50MHZ，跳線J18閉路J6開路，開發環境為CW10.5和MQX4.1+MQX_4_1_0_1_Patch。
該範例在MQX4.1底下為"sai_dma_demo"，燒錄完後透過Terminal輸入指令，可以正確播放MicroSD卡中的48kHz/16bit的wav檔並錄音。從側邊TWR-ELEV板上的A21~A25(I2S訊號和時脈)，可以量測到時脈：
1. MCLK = 8.?MHz(不穩，但SGTL似乎使用內部晶振所以用不到)
2. BCLK = 1.536MHz
3. LRLK = 48.0kHz
但是如果要在24bit的格式下工作，MCLK和BCLK必須為12.288MHz及3.072MHz。
透過main.h和sai_dma_ksai.c可以修改一些參數：
main.h
43 #define CLK_MULT          (384) //修改為(256)

sai_dma_ksai.c
case IO_IOCTL_I2S_SET_FS_FREQ:
1007 io_info_ptr->FS_FREQ = io_info_ptr->BCLK_FREQ / (io_info_ptr->DATA_BITS * MYCHANNELS);  //設定為48000
避免系統因為偵測到24bit，換算出錯誤結果阻止工作。
1012 i2s_ptr->TCR2 |= I2S_TCR2_DIV((io_info_ptr->BCLK_DIV / 2) - 1);  //()內部原來結果會為3，設定為1
1018 i2s_ptr->RCR2 |= I2S_RCR2_DIV((io_info_ptr->BCLK_DIV / 2) - 1);  //()內部原來結果會為3，設定為1
可以讓BCLK因除頻4得到3.072MHz。

case IO_IOCTL_I2S_SET_DATA_BITS:
789 uint8_t  data_bits =  *((uint8_t  *) param);  //設定為32
此時底下的TCR5_W0W、WNW及TCR4_SYWD會將LRLK固定回48.0kHz，要測試16bit音效必須將TCR5_FBT設定為15(16-1)，就可以正確操作錄音撥放功能。

但是如果將TCR5_FBT設定為23(24-1)，此時Data線就不會有資料傳送，有人曉得原因或如何設定在48k/24bit下工作嗎？