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发表于 2014-10-15 12:40:19
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飞思卡尔的回复如下:
Power on reset level (VPORD) is approximately 1V (0.9…1.1V). MCU will start working (left low voltage reset state) at VDDX Low Voltage Reset Deassert value VLVRXD = 3.05V. Operating range for power supply is 3.13 … 5.5V.
According to design, below 3V the period of the ACLK could be affected (comment for the S12VR; but I think both (S12G and S12VR) use the same ACLK block). This may also affect the period of the COP when clocked from the ACLK.
For the S12G64, I measured (at room temperature) that around 2.3V, the period of the API starts to change. The part I tested continued to operate (in stop mode with no RESET) up to 1.45V. At such voltage (1.45V) the API period had changed from 1.97ms to ~1.5ms. Around 23% variation from the original period.
Below 1.45V (at room temperature) the part I was testing RESET. However, I understand that the POR threshold is a function of temperature and part variation. Not Cz’d.
Some OEMs may have requirements that will force tier ones to use an external POR circuit to assure the MCU will be RESET when VDDR is below 3.13V. Let’s say the external POR will de assert reset above 3.25V and assert reset below 3.15V. |
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