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- 2016-1-21
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LDD_TDeviceData* I2C1_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate HAL device structure */
I2C1_TDeviceData *DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserData = UserDataPtr; /* Store the RTOS device structure */
/* Allocate interrupt vector */
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings.isrData = _int_get_isr_data(LDD_ivIndex_INT_I2C1);
DeviceDataPrv->SavedISRSettings.isrFunction = _int_install_isr(LDD_ivIndex_INT_I2C1, I2C1_Interrupt, DeviceDataPrv);
DeviceDataPrv->SerFlag = ADDR_7; /* Reset all flags start with 7-bit address mode */
DeviceDataPrv->SlaveAddr = 0x3AU; /* Set variable for slave address */
DeviceDataPrv->SendStop = LDD_I2C_SEND_STOP; /* Set variable for sending stop condition (for master mode) */
DeviceDataPrv->InpLenM = 0x00U; /* Set zero counter of data of reception */
DeviceDataPrv->OutLenM = 0x00U; /* Set zero counter of data of transmission */
DeviceDataPrv->ErrorMask = 0x00U; /* Clear variable for errors mask value */
/* SIM_SCGC4: I2C1=1 */
SIM_SCGC4 |= SIM_SCGC4_I2C1_MASK;
/* I2C1_C1: IICEN=0,IICIE=0,MST=0,TX=0,TXAK=0,RSTA=0,WUEN=0,DMAEN=0 */
I2C1_C1 = 0X00u; /* Clear control register */
/* I2C1_FLT: SHEN=0,STOPF=1,STOPIE=0,FLT=0 */
I2C1_FLT = (I2C_FLT_STOPF_MASK | I2C_FLT_FLT(0x00)); /* Clear bus status interrupt flags */
/* I2C1_S: TCF=0,IAAS=0,BUSY=0,ARBL=0,RAM=0,SRW=0,IICIF=1,RXAK=0 */
I2C1_S = I2C_S_IICIF_MASK; /* Clear interrupt flag */
/* PORTC_PCR10: ISF=0,MUX=2 */
PORTC_PCR10 = (uint32_t)((PORTC_PCR10 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x00)
)) | (uint32_t)(
PORT_PCR_MUX(0x02)
));
/* PORTC_PCR11: ISF=0,MUX=2 */
PORTC_PCR11 = (uint32_t)((PORTC_PCR11 & (uint32_t)~(uint32_t)(
PORT_PCR_ISF_MASK |
PORT_PCR_MUX(0x00)
)) | (uint32_t)(
PORT_PCR_MUX(0x02)
));
/* NVIC_IPR2: PRI_8=0x80 */
NVIC_IPR2 = (uint32_t)((NVIC_IPR2 & (uint32_t)~(uint32_t)(
NVIC_IP_PRI_8(0x7F)
)) | (uint32_t)(
NVIC_IP_PRI_8(0x80)
));
/* NVIC_ISER: SETENA|=0x0100 */
NVIC_ISER |= NVIC_ISER_SETENA(0x0100);
/* I2C1_C2: GCAEN=0,ADEXT=0,HDRS=0,SBRC=0,RMEN=0,AD=0 */
I2C1_C2 = I2C_C2_AD(0x00);
/* I2C1_FLT: SHEN=0,STOPF=0,STOPIE=0,FLT=0 */
I2C1_FLT = I2C_FLT_FLT(0x00); /* Set glitch filter register */
/* I2C1_SMB: FACK=0,ALERTEN=0,SIICAEN=0,TCKSEL=0,SLTF=1,SHTF1=0,SHTF2=0,SHTF2IE=0 */
I2C1_SMB = I2C_SMB_SLTF_MASK;
/* I2C1_F: MULT=0,ICR=0x14 */
I2C1_F = (I2C_F_MULT(0x00) | I2C_F_ICR(0x14)); /* Set prescaler bits */
I2C_PDD_EnableDevice(I2C1_BASE_PTR, PDD_ENABLE); /* Enable device */
I2C_PDD_EnableInterrupt(I2C1_BASE_PTR); /* Enable interrupt */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_I2C_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the data data structure */
}
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