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- 2017-3-8
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DAC初始化
void dacInit (void)
{
SIM_SCGC5 |= SIM_SCGC5_PORTE_MASK; /* 开启PE GPIO时钟 */
PORTE_PCR30 |= PORT_PCR_MUX(0); /* 开启PE30管脚模拟功能 */
SIM_SCGC6 |= SIM_SCGC6_DAC0_MASK; /* 开启DAC时钟 */
/*
* 配置DAC相关功能
*/
DAC0_C0 |= DAC_C0_DACEN_MASK | DAC_C0_DACRFS_MASK | DAC_C0_LPEN_MASK | DAC_C0_DACTRGSEL_MASK;
}
dac软件触发函数
void dacTrigger (INT16U uiData)
{
/*
* DAC寄存器赋值
*/
DAC0_DATL(0) = uiData & 0x00ff; /* 选择DAC低位寄存器赋值 */
DAC0_DATH(0) = uiData >> 8; /* 选择DAC高位寄存器赋值 */
DAC0_C0 |= DAC_C0_DACSWTRG_MASK; /* DAC软件触发 */
}
附带的用户源代码里面是有部分有些问题的。
/** DAC - Peripheral register structure */
typedef struct DAC_MemMap {
struct { /* offset: 0x0, array step: 0x2 */
uint8_t DATL; /**< DAC Data Low Register, array offset: 0x0, array step: 0x2 */
uint8_t DATH; /**< DAC Data High Register, array offset: 0x1, array step: 0x2 */
} DAT[2];
uint8_t RESERVED_0[28];
uint8_t SR; /**< DAC Status Register, offset: 0x20 */
uint8_t C0; /**< DAC Control Register, offset: 0x21 */
uint8_t C1; /**< DAC Control Register 1, offset: 0x22 */
uint8_t C2; /**< DAC Control Register 2, offset: 0x23 */
} volatile *DAC_MemMapPtr;
/* ----------------------------------------------------------------------------
-- DAC - Register accessor macros
---------------------------------------------------------------------------- */
/**
* @addtogroup DAC_Register_Accessor_Macros DAC - Register accessor macros
* @{
*/
/* DAC - Register accessors */
#define DAC_DATL_REG(base,index) ((base)->DAT[index].DATL)
#define DAC_DATH_REG(base,index) ((base)->DAT[index].DATH)
#define DAC_SR_REG(base) ((base)->SR)
#define DAC_C0_REG(base) ((base)->C0)
#define DAC_C1_REG(base) ((base)->C1)
#define DAC_C2_REG(base) ((base)->C2)
/**
* @}
*/ /* end of group DAC_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- DAC Register Masks
---------------------------------------------------------------------------- */
/**
* @addtogroup DAC_Register_Masks DAC Register Masks
* @{
*/
/* DATL Bit Fields */
#define DAC_DATL_DATA0_MASK 0xFFu
#define DAC_DATL_DATA0_SHIFT 0
#define DAC_DATL_DATA0(x) (((uint8_t)(((uint8_t)(x))<<DAC_DATL_DATA0_SHIFT))&DAC_DATL_DATA0_MASK)
/* DATH Bit Fields */
#define DAC_DATH_DATA1_MASK 0xFu
#define DAC_DATH_DATA1_SHIFT 0
#define DAC_DATH_DATA1(x) (((uint8_t)(((uint8_t)(x))<<DAC_DATH_DATA1_SHIFT))&DAC_DATH_DATA1_MASK)
/* SR Bit Fields */
#define DAC_SR_DACBFRPBF_MASK 0x1u
#define DAC_SR_DACBFRPBF_SHIFT 0
#define DAC_SR_DACBFRPTF_MASK 0x2u
#define DAC_SR_DACBFRPTF_SHIFT 1
/* C0 Bit Fields */
#define DAC_C0_DACBBIEN_MASK 0x1u
#define DAC_C0_DACBBIEN_SHIFT 0
#define DAC_C0_DACBTIEN_MASK 0x2u
#define DAC_C0_DACBTIEN_SHIFT 1
#define DAC_C0_LPEN_MASK 0x8u
#define DAC_C0_LPEN_SHIFT 3
#define DAC_C0_DACSWTRG_MASK 0x10u
#define DAC_C0_DACSWTRG_SHIFT 4
#define DAC_C0_DACTRGSEL_MASK 0x20u
#define DAC_C0_DACTRGSEL_SHIFT 5
#define DAC_C0_DACRFS_MASK 0x40u
#define DAC_C0_DACRFS_SHIFT 6
#define DAC_C0_DACEN_MASK 0x80u
#define DAC_C0_DACEN_SHIFT 7
/* C1 Bit Fields */
#define DAC_C1_DACBFEN_MASK 0x1u
#define DAC_C1_DACBFEN_SHIFT 0
#define DAC_C1_DACBFMD_MASK 0x4u
#define DAC_C1_DACBFMD_SHIFT 2
#define DAC_C1_DMAEN_MASK 0x80u
#define DAC_C1_DMAEN_SHIFT 7
/* C2 Bit Fields */
#define DAC_C2_DACBFUP_MASK 0x1u
#define DAC_C2_DACBFUP_SHIFT 0
#define DAC_C2_DACBFRP_MASK 0x10u
#define DAC_C2_DACBFRP_SHIFT 4
/**
* @}
*/ /* end of group DAC_Register_Masks */
/* DAC - Peripheral instance base addresses */
/** Peripheral DAC0 base pointer */
#define DAC0_BASE_PTR ((DAC_MemMapPtr)0x4003F000u)
/** Array initializer of DAC peripheral base pointers */
#define DAC_BASE_PTRS { DAC0_BASE_PTR }
/* ----------------------------------------------------------------------------
-- DAC - Register accessor macros
---------------------------------------------------------------------------- */
/**
* @addtogroup DAC_Register_Accessor_Macros DAC - Register accessor macros
* @{
*/
/* DAC - Register instance definitions */
/* DAC0 */
#define DAC0_DAT0L DAC_DATL_REG(DAC0_BASE_PTR,0)
#define DAC0_DAT0H DAC_DATH_REG(DAC0_BASE_PTR,0)
#define DAC0_DAT1L DAC_DATL_REG(DAC0_BASE_PTR,1)
#define DAC0_DAT1H DAC_DATH_REG(DAC0_BASE_PTR,1)
#define DAC0_SR DAC_SR_REG(DAC0_BASE_PTR)
#define DAC0_C0 DAC_C0_REG(DAC0_BASE_PTR)
#define DAC0_C1 DAC_C1_REG(DAC0_BASE_PTR)
#define DAC0_C2 DAC_C2_REG(DAC0_BASE_PTR)
但是这些可以直接使用
可以承受一些自己重新写的风险,但是我的DAC_Init()就编译什么的都可以,却没办法运行!之后再看DAC了
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