系统初始化的问题

wambob

使用官方源码程序生成工具，程序已经在初始化时打开了端口A\B\C\D\E时钟，为什么在main里不起作用。

void sysinit (void)
{
        /* Enable all of the port clocks. These have to be enabled to configure
         * pin muxing options, so most code will need all of these on anyway.
         */
        SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
                      | SIM_SCGC5_PORTB_MASK
                      | SIM_SCGC5_PORTC_MASK
                      | SIM_SCGC5_PORTD_MASK
                      | SIM_SCGC5_PORTE_MASK );
        
        // Release hold with ACKISO:  Only has an effect if recovering from VLLS1, VLLS2, or VLLS3
        // if ACKISO is set you must clear ackiso before calling pll_init
        //    or pll init hangs waiting for OSC to initialize
        // if osc enabled in low power modes - enable it first before ack
        // if I/O needs to be maintained without glitches enable outputs and modules first before ack.
        if (PMC_REGSC &  PMC_REGSC_ACKISO_MASK)
        PMC_REGSC |= PMC_REGSC_ACKISO_MASK;
        
#ifdef ENABLE_CLKOUT
        // Initialize trace clk functionality
        clk_out_init();
#endif
   
#ifndef CMSIS
       /* Ramp up the system clock */
       /* Set the system dividers */
       /* NOTE: The PLL init will not configure the system clock dividers,
        * so they must be configured appropriately before calling the PLL
        * init function to ensure that clocks remain in valid ranges.
        */  
        SIM_CLKDIV1 = ( 0
                        | SIM_CLKDIV1_OUTDIV1(OUTDIV1_VAL)
                        | SIM_CLKDIV1_OUTDIV4(OUTDIV4_VAL) );

#if defined(NO_PLL_INIT)
        // If PLL initialization is not desired, set FLL to 48 MHz clock in default FEI mode
        // Set DMX32 and DRST_DRS values accordingly
        MCG_C4 = ((MCG_C4 & ~(MCG_C4_DRST_DRS_MASK)) | ((FLL_DMX32 << MCG_C4_DMX32_SHIFT)
                                                     | (FLL_DRST_DRS << MCG_C4_DRST_DRS_SHIFT)));
        if (FLL_DMX32 == 0)
            mcg_clk_hz = 640 * (FLL_DRST_DRS + 1) * FLL_REF_FREQ;
        else
            mcg_clk_hz = 732 * (FLL_DRST_DRS + 1) * FLL_REF_FREQ;
        
        SIM_SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK; // clear PLLFLLSEL to select the FLL for this clock source
        
        uart0_clk_khz = (mcg_clk_hz / 1000); // the uart0 clock frequency will equal the FLL frequency
        
        SIM_SOPT2 = ((SIM_SOPT2 & ~SIM_SOPT2_UART0SRC_MASK) | SIM_SOPT2_UART0SRC(1));
      
#else
       /* Initialize PLL */
       /* PLL will be the source for MCG CLKOUT so the core, system, and flash clocks are derived from it */
       mcg_clk_hz = pll_init(CLK0_FREQ_HZ,  /* CLKIN0 frequency */
                             LOW_POWER,     /* Set the oscillator for low power mode */
                             CLK0_TYPE,     /* Crystal or canned oscillator clock input */
                             PLL0_PRDIV,    /* PLL predivider value */
                             PLL0_VDIV,     /* PLL multiplier */
                             MCGOUT);       /* Use the output from this PLL as the MCGOUT */
               
               
   /* Check the value returned from pll_init() to make sure there wasn't an error */
       if (mcg_clk_hz < 0x100)
         while(1);
      
       SIM_SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; // set PLLFLLSEL to select the PLL for this clock source
      
       uart0_clk_khz = ((mcg_clk_hz / 2) / 1000); // UART0 clock frequency will equal half the PLL frequency
      
       SIM_SOPT2 = ((SIM_SOPT2 & ~SIM_SOPT2_UART0SRC_MASK) | SIM_SOPT2_UART0SRC(1));
#endif
   
#else
mcg_clk_hz = SystemCoreClock;
   
if (CLOCK_SETUP == 3)
{
// If PLL initialization is not desired, set FLL to 48 MHz clock in default FEI mode
  MCG_C4 |= (MCG_C4_DRST_DRS(1) | MCG_C4_DMX32_MASK);
        
  SIM_SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK; // clear PLLFLLSEL to select the FLL for this clock source
        
  uart0_clk_khz = (mcg_clk_hz / 1000); // the uart0 clock frequency will equal the FLL frequency
        
  SIM_SOPT2 = ((SIM_SOPT2 & ~SIM_SOPT2_UART0SRC_MASK) | SIM_SOPT2_UART0SRC(1));
}
else
{      
  SIM_SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; // set PLLFLLSEL to select the PLL for this clock source
   
  uart0_clk_khz = ((mcg_clk_hz / 2) / 1000); // UART0 clock frequency will equal half the PLL frequency
      
  SIM_SOPT2 = ((SIM_SOPT2 & ~SIM_SOPT2_UART0SRC_MASK) | SIM_SOPT2_UART0SRC(1));
}
#endif   
/*
         * Use the value obtained from the pll_init function to define variables
  * for the core clock in kHz and also the peripheral clock. These
  * variables can be used by other functions that need awareness of the
  * system frequency.
  */
        mcg_clk_khz = mcg_clk_hz / 1000;
   core_clk_khz = mcg_clk_khz / (((SIM_CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> 28)+ 1);
        periph_clk_khz = core_clk_khz / (((SIM_CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> 16)+ 1);
        
#ifdef USE_ABORT_BUTTON
        /* Enable pin interrupt for the abort button - PTA4 */
        /* This pin could also be used as the NMI interrupt, but since the NMI
         * is level sensitive each button press will cause multiple interrupts.
         * Using the GPIO interrupt instead means we can configure for an edge
         * sensitive interrupt instead = one interrupt per button press.
         */
        enable_abort_button();
#endif
        
        
        /*
         * Configure the UART terminal port pins.  These definitions are
         * defined in the platform header file.
         */
        
        PORT_PCR_REG(TERM_PIN_PORT, TERM_RX_PIN) = PORT_PCR_MUX(TERM_MUX_ALT);
        PORT_PCR_REG(TERM_PIN_PORT, TERM_TX_PIN) = PORT_PCR_MUX(TERM_MUX_ALT);
        
   /* UART0 is clocked asynchronously to the core clock, but all other UARTs are
         * clocked from the peripheral clock. So we have to determine which clock
         * to send to the UART_init function.
         */
        if (TERM_PORT_NUM == 0)
            uart0_init (UART0_BASE_PTR, uart0_clk_khz, TERMINAL_BAUD);
        else if (TERM_PORT_NUM == 1)
       uart_init (UART1_BASE_PTR, periph_clk_khz, TERMINAL_BAUD);
        else if (TERM_PORT_NUM == 2)
            uart_init (UART2_BASE_PTR, periph_clk_khz, TERMINAL_BAUD);
        else
          while(1);
}

我知道答案 目前已有7人回答

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jasonliu65535

需要调用。。。

wambob

jasonliu65535 发表于 2015-5-4 10:11
需要调用。。。

已经在主函数中调用了，没效果，才发的帖
主函数中

1. 
   
2. <P>#ifdef CMSIS  // If we are conforming to CMSIS, we need to call start here
   
3.     start();
   
4. #endif </P>

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而CMSIS是预定义了的，所以调用START()进入

1. 
   
2. <P>
   
3. <P>void start(void)
   
4. {
   
5. /* Disable the watchdog timer */
   
6. SIM_COPC = 0x00;
   
7. /* Perform clock initialization, default UART initialization,
   
8. * initializes clock out function, and enables the abort button
   
9. */
   
10. sysinit;
    
11. printf("\n\r系统初始化\n\r
    
12. /* Determine the last cause(s) of reset */
    
13. outSRS();
    
14. /* Determine specific Kinetis L Family device and revision */
    
15. cpu_identify();
    
16. }</P></P>

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使用串口助手，调试，串口显示 系统初始化 ，表示程序的确调用了sysinit()。

jasonliu65535

看看寄存器的值呗，是不是都写入了

wambob

jasonliu65535 发表于 2015-5-4 10:49
看看寄存器的值呗，是不是都写入了

谢谢提示，没有写进去。单步了下，发现LED的初始化代码放在时钟初始化之前导致程序跑飞了，把代码放到后面好了

1. // LED_init();
   
2. #ifdef CMSIS // If we are conforming to CMSIS, we need to call start here
   
3. start();
   
4. #endif
   
5. LED_init();
   
6. 
   

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wambob

jasonliu65535 发表于 2015-5-4 10:11
需要调用。。。

调用之前跑飞了

jasonliu65535

wambob 发表于 2015-5-4 11:27
调用之前跑飞了

原来是这样啊

FSL_TICS_Robin

wambob 发表于 2015-5-4 11:14
谢谢提示，没有写进去。单步了下，发现LED的初始化代码放在时钟初始化之前导致程序跑飞了，把代码放到后 ...

非常感谢你关于Kinetis的经验分享 ！