我有看到一份文件是AN2497,里面6.2.4 SYNC 章节有提到,如下 :
/*******************************************************************************/
This command is performed by driving the BKGD pin low for at least 128 cycles of the slowest possible
BDC clock. This command is used for detecting a BDC communication speed by receiving a
128-BDM-cycle low pulse on the BKGD pin from the target MCU.
/*******************************************************************************/