MK64晶振配置

做一个小强 · 发表于 2015-12-10 17:32:06

我是用的是MK64，在配置晶振中4MHZ IRC配置总是有误，请高手帮忙，用的是IAR，程序如下：

/* Configuration for enter VLPR mode. Core clock = 4MHz. */
const clock_manager_user_config_t g_defaultClockConfigVlpr =
{
.mcgConfig =
{
      .mcg_mode          = kMcgModeFEE, // Work in FEI mode.
      .irclkEnable       = true,  // MCGIRCLK enable.
      .irclkEnableInStop  = false, // MCGIRCLK disable in STOP mode.
      .ircs             = kMcgIrcFast, // Select IRC4M.
      .fcrdiv          = 1U, // FCRDIV is 2.

      .frdiv = 1U,
      .drs    = kMcgDcoRangeSelHigh,  // High frequency range
      .dmx32 =  kMcgDmx32Fine, // DCO is fine-tuned for maximum frequency with 32.768 kHz reference
      .oscsel  = kMcgOscselOsc,    // Select OSC

      .pll0EnableInFllMode = true,  // PLL0 enable
      .pll0EnableInStop = false,  // PLL0 disalbe in STOP mode
      .prdiv0             = 0U,
      .vdiv0             = 1U,
},
.simConfig =
{
      .pllFllSel = kClockPllFllSelFll, // Fll clock.
      .er32kSrc  = kClockEr32kSrcRtc,    // ERCLK32K selection, use RTC.
      .outdiv1 = 0U,
      .outdiv2 = 0U,
      .outdiv3 = 0U,
      .outdiv4 = 3U,
},
.oscerConfig =
{
      .enable    = true,  // OSCERCLK enable.
      .enableInStop = false, // OSCERCLK disable in STOP mode.
}
};

我知道答案目前已有6人回答

阅读全文