程序从codewarrior迁移到keil提示错误

yaomeng0725 · 发表于 2020-7-4 16:28:18

本帖最后由 yaomeng0725 于 2020-7-7 10:57 编辑

因为程序超过64K所以使用codewarrior不能进行debug，所以想着把程序迁移至keil
编译后出现以下提示：
.\Objects\smartairfilter.axf: Error: L6218E: Undefined symbol __initial_sp (referred from vectors.o).

请各位查看相关附件，不胜感激

#ifndef __VECTORS_H
#define __VECTORS_H 1
// function prototype for default_isr in vectors.c
void default_isr(void);
void abort_isr(void);
void hard_fault_handler_c(unsigned int * hardfault_args);
/* Interrupt Vector Table Function Pointers */
typedef void pointer(void);
extern void __startup(void);
extern unsigned long __BOOT_STACK_ADDRESS[];
extern unsigned long __initial_sp[];
extern void Reset_Handler( void );
#define VECTOR_000 (pointer*) __initial_sp // ARM core Initial Supervisor SP
#define VECTOR_001 Reset_Handler // 0x0000_0004 1 - ARM core Initial Program Counter
#define VECTOR_002 default_isr // 0x0000_0008 2 - ARM core Non-maskable Interrupt (NMI)
#define VECTOR_003 default_isr // 0x0000_000C 3 - ARM core Hard Fault
#define VECTOR_004 default_isr // 0x0000_0010 4 -
#define VECTOR_005 default_isr // 0x0000_0014 5 - ARM core Bus Fault
#define VECTOR_006 default_isr // 0x0000_0018 6 - ARM core Usage Fault
#define VECTOR_007 default_isr // 0x0000_001C 7 -
#define VECTOR_008 default_isr // 0x0000_0020 8 -
#define VECTOR_009 default_isr // 0x0000_0024 9 -
#define VECTOR_010 default_isr // 0x0000_0028 10 -
#define VECTOR_011 default_isr // 0x0000_002C 11 - ARM core Supervisor call (SVCall)
#define VECTOR_012 default_isr // 0x0000_0030 12 - ARM core Debug Monitor
#define VECTOR_013 default_isr // 0x0000_0034 13 -
#define VECTOR_014 default_isr // 0x0000_0038 14 - ARM core Pendable request for system service (PendableSrvReq)
#define VECTOR_015 default_isr // 0x0000_003C 15 - ARM core System tick timer (SysTick)
#define VECTOR_016 default_isr // 0x0000_0040 16 0 Reserved DMA DMA Channel 0 transfer complete
#define VECTOR_017 default_isr // 0x0000_0044 17 1 Reserved DMA DMA Channel 1 transfer complete
#define VECTOR_018 default_isr // 0x0000_0048 18 2 Reserved DMA DMA Channel 2 transfer complete
#define VECTOR_019 default_isr // 0x0000_004C 19 3 Reserved DMA DMA Channel 3 transfer complete
#define VECTOR_020 default_isr // 0x0000_0050 20 4 Reserved MCM MCM
#define VECTOR_021 default_isr // 0x0000_0054 21 5 NVM FTMRH flash memory command complete,ECC fault
#define VECTOR_022 default_isr // 0x0000_0058 22 6 PMC LVD,LVW interrupt
#define VECTOR_023 default_isr // 0x0000_005C 23 7 LLWU LLWU/IRQ
#define VECTOR_024 default_isr // 0x0000_0060 24 8 I2C0 I2C
#define VECTOR_025 default_isr // 0x0000_0064 25 9 - --
#define VECTOR_026 default_isr // 0x0000_0068 26 10 SPI0 SPI0
#define VECTOR_027 default_isr // 0x0000_006C 27 11 SPI1 SPI1
#define VECTOR_028 default_isr // 0x0000_0070 28 12 SCI0 UART0
#define VECTOR_029 default_isr // 0x0000_0074 29 13 SCI1 UART1
#define VECTOR_030 default_isr // 0x0000_0078 30 14 SCI2 UART2
#define VECTOR_031 default_isr // 0x0000_007C 31 15 ADC0 ADC conversion complete
#define VECTOR_032 default_isr // 0x0000_0080 32 16 ACMP0 ACMP0
#define VECTOR_033 default_isr // 0x0000_0084 33 17 FTM0 FlexTimer0
#define VECTOR_034 default_isr // 0x0000_0088 34 18 FTM1 FlexTimer1
#define VECTOR_035 default_isr // 0x0000_008C 35 19 FTM2 FlexTimer2
#define VECTOR_036 default_isr // 0x0000_0090 36 20 RTC RTC overflow
#define VECTOR_037 default_isr // 0x0000_0094 37 21 ACMP1 ACMP1
#define VECTOR_038 default_isr // 0x0000_0098 38 22 PIT_CH0 PIT_CH0 overflow
#define VECTOR_039 default_isr // 0x0000_009C 39 23 PIT_CH1 PIT_CH1 overflow
#define VECTOR_040 default_isr // 0x0000_00A0 40 24 KBI0 Keyboard0 interrupt
#define VECTOR_041 default_isr // 0x0000_00A4 41 25 KBI1 Keyboard1 interrupt
#define VECTOR_042 default_isr // 0x0000_00A8 42 26 Reserved ---
#define VECTOR_043 default_isr // 0x0000_00AC 43 27 ICS ICS loss of lock
#define VECTOR_044 default_isr // 0x0000_00B0 44 28 WDOG Watchdog timeout
#define VECTOR_045 default_isr // 0x0000_00B4 45 29 Reserved
#define VECTOR_046 default_isr // 0x0000_00B8 46 30 Reserved
#define VECTOR_047 default_isr // 0x0000_00BC 47 31 Reserved // END of real vector table
/********************************************************************************************************************/
#define VECTOR_048 default_isr // 0x0000_00C0 48 32 Reserved
#define VECTOR_049 default_isr // 0x0000_00C4 49 33 Reserved
#define VECTOR_050 default_isr // 0x0000_00C8 50 34 Reserved
#define VECTOR_051 default_isr // 0x0000_00CC 51 35 Reserved
#define VECTOR_052 default_isr // 0x0000_00D0 52 36 Reserved
#define VECTOR_053 default_isr // 0x0000_00D4 53 37 Reserved
#define VECTOR_054 default_isr // 0x0000_00D8 54 38 Reserved
#define VECTOR_055 default_isr // 0x0000_00DC 55 39 Reserved
#define VECTOR_056 default_isr // 0x0000_00E0 56 40 Reserved
#define VECTOR_057 default_isr // 0x0000_00E4 57 41 Reserved
#define VECTOR_058 default_isr // 0x0000_00E8 58 42 Reserved
#define VECTOR_059 default_isr // 0x0000_00EC 59 43 Reserved
#define VECTOR_060 default_isr // 0x0000_00F0 60 44 Reserved
#define VECTOR_061 default_isr // 0x0000_00F4 61 45 Reserved Single interrupt vector for SCI status sources
#define VECTOR_062 default_isr // 0x0000_00F8 62 46 Reserved Single interrupt vector for SCI error sources
#define VECTOR_063 default_isr // 0x0000_00FC 63 47 Reserved Single interrupt vector for SCI status sources
#define VECTOR_064 default_isr // 0x0000_0100 64 48 Reserved Single interrupt vector for SCI error sources
#define VECTOR_065 default_isr // 0x0000_0104 65 49 Reserved Single interrupt vector for SCI status sources
#define VECTOR_066 default_isr // 0x0000_0108 66 50 Reserved Single interrupt vector for SCI error sources
#define VECTOR_067 default_isr // 0x0000_010C 67 51 Reserved Single interrupt vector for SCI status sources
#define VECTOR_068 default_isr // 0x0000_0110 68 52 Reserved Single interrupt vector for SCI error sources
#define VECTOR_069 default_isr // 0x0000_0114 69 53 Reserved Single interrupt vector for SCI status sources
#define VECTOR_070 default_isr // 0x0000_0118 70 54 Reserved Single interrupt vector for SCI error sources
#define VECTOR_071 default_isr // 0x0000_011C 71 55 Reserved Single interrupt vector for SCI status sources
#define VECTOR_072 default_isr // 0x0000_0120 72 56 Reserved Single interrupt vector for SCI error sources
#define VECTOR_073 default_isr // 0x0000_0124 73 57 Reserved
#define VECTOR_074 default_isr // 0x0000_0128 74 58 Reserved
#define VECTOR_075 default_isr // 0x0000_012C 75 59 Reserved
#define VECTOR_076 default_isr // 0x0000_0130 76 60 Reserved
#define VECTOR_077 default_isr // 0x0000_0134 77 61 Reserved
#define VECTOR_078 default_isr // 0x0000_0138 78 62 Reserved Single interrupt vector for all sources
#define VECTOR_079 default_isr // 0x0000_013C 79 63 Reserved Single interrupt vector for all sources
#define VECTOR_080 default_isr // 0x0000_0140 80 64 Reserved Single interrupt vector for all sources
#define VECTOR_081 default_isr // 0x0000_0144 81 65 Reserved
#define VECTOR_082 default_isr // 0x0000_0148 82 66 Reserved
#define VECTOR_083 default_isr // 0x0000_014C 83 67
#define VECTOR_084 default_isr // 0x0000_0150 84 68
#define VECTOR_085 default_isr // 0x0000_0154 85 69
#define VECTOR_086 default_isr // 0x0000_0158 86 70
#define VECTOR_087 default_isr // 0x0000_015C 87 71
#define VECTOR_088 default_isr // 0x0000_0160 88 72
#define VECTOR_089 default_isr // 0x0000_0164 89 73
#define VECTOR_090 default_isr // 0x0000_0168 90 74
#define VECTOR_091 default_isr // 0x0000_016C 91 75
#define VECTOR_092 default_isr // 0x0000_0170 92 76
#define VECTOR_093 default_isr // 0x0000_0174 93 77
#define VECTOR_094 default_isr // 0x0000_0178 94 78
#define VECTOR_095 default_isr // 0x0000_017C 95 79
#define VECTOR_096 default_isr // 0x0000_0180 96 80
#define VECTOR_097 default_isr // 0x0000_0184 97 81
#define VECTOR_098 default_isr // 0x0000_0188 98 82
#define VECTOR_099 default_isr // 0x0000_018C 99 83
#ifdef USE_BOOTLOADER
#else
#define CONFIG_1 0xffffffff
#define CONFIG_2 0xffffffff
#define CONFIG_3 0xffffffff
#define CONFIG_4 0xfffeffff
#endif
#endif /*__VECTORS_H*/
/* End of "vectors.h" */

复制代码

我知道答案目前已有11人回答

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小恩GG · 发表于 2020-7-6 11:10:20

__initial_sp定义在了哪里？

yaomeng0725 · 发表于 2020-7-6 21:39:16

本帖最后由 yaomeng0725 于 2020-7-6 21:58 编辑

小恩GG 发表于 2020-7-6 11:10
__initial_sp定义在了哪里？

没有定义，在startup_SKEAZ1284.s出现过。
原工程用的是#define VECTOR_000 (pointer*)&_estack;搜索全局没有_estack的定义，在SKEAZ128_FLASH.LD文件中出现了/* Highest address of the user mode stack */
_estack = 0x20003000; /* end of SRAM */
__SP_INIT = _estack;
的定义。

keil没有SKEAZ128_FLASH.LD文件吧？
__initial_sp 我该怎么定义？在哪里定义？直接定义
#define VECTOR_000 (pointer*)0x20003000 么？

小恩GG · 发表于 2020-7-7 09:06:49

yaomeng0725 发表于 2020-7-6 21:39
没有定义，在startup_SKEAZ1284.s出现过。
原工程用的是#define VECTOR_000 (pointer*)&_estack;搜索 ...

.s 文件看一下，__initial_sp应该在.s文件导出符号，看起来应该是.s的文件问题

yaomeng0725 · 发表于 2020-7-7 09:33:50

小恩GG 发表于 2020-7-7 09:06
.s 文件看一下，__initial_sp应该在.s文件导出符号，看起来应该是.s的文件问题 ...

;/*****************************************************************************
; * @file: startup_SKEAZ1284.s
; * @purpose: CMSIS Cortex-M0plus Core Device Startup File for the
; * SKEAZ1284
; * @version: 1.2
; * @date: 2014-1-10
; *
; * Copyright: 1997 - 2014 Freescale Semiconductor, Inc. All Rights Reserved.
;*
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; *
; *****************************************************************************/
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000100
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD Reserved16_IRQHandler ; Reserved interrupt
DCD Reserved17_IRQHandler ; Reserved interrupt
DCD Reserved18_IRQHandler ; Reserved interrupt
DCD Reserved19_IRQHandler ; Reserved interrupt
DCD Reserved20_IRQHandler ; Reserved interrupt
DCD FTMRE_IRQHandler ; Command complete and read collision
DCD PMC_IRQHandler ; Low-voltage detect, low-voltage warning
DCD IRQ_IRQHandler ; External Interrupt
DCD I2C0_IRQHandler ; I2C0 interrupt
DCD I2C1_IRQHandler ; I2C1 interrupt
DCD SPI0_IRQHandler ; SPI0 single interrupt vector for all sources
DCD SPI1_IRQHandler ; SPI1 single interrupt vector for all sources
DCD UART0_IRQHandler ; UART0 status and error
DCD UART1_IRQHandler ; UART1 status and error
DCD UART2_IRQHandler ; UART2 status and error
DCD ADC_IRQHandler ; ADC interrupt
DCD ACMP0_IRQHandler ; ACMP0 interrupt
DCD FTM0_IRQHandler ; FTM0 single interrupt vector for all sources
DCD FTM1_IRQHandler ; FTM1 single interrupt vector for all sources
DCD FTM2_IRQHandler ; FTM2 single interrupt vector for all sources
DCD RTC_IRQHandler ; RTC overflow
DCD ACMP1_IRQHandler ; ACMP1 interrupt
DCD PIT_CH0_IRQHandler ; PIT CH0 overflow
DCD PIT_CH1_IRQHandler ; PIT CH1 overflow
DCD KBI0_IRQHandler ; Keyboard interrupt0(32bit)
DCD KBI1_IRQHandler ; Keyboard interrupt1(32bit)
DCD Reserved42_IRQHandler ; Reserved interrupt
DCD ICS_IRQHandler ; ICS interrupt
DCD WDOG_IRQHandler ; Watchdog timeout
DCD PWT_IRQHandler ; PWT interrupt
DCD MSCAN_RX_IRQHandler ; MSCAN Rx Interrupt
DCD MSCAN_TX_IRQHandler ; MSCAN Tx, Err and Wake-up interrupt
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
; <h> Flash Configuration
; 16-byte flash configuration field that stores default protection settings (loaded on reset)
; and security information that allows the MCU to restrict acces to the FTFL module.
; <h> Backdoor Comparison Key
; <o0> Backdoor Key 0 <0x0-0xFF:2>
; <o1> Backdoor Key 1 <0x0-0xFF:2>
; <o2> Backdoor Key 2 <0x0-0xFF:2>
; <o3> Backdoor Key 3 <0x0-0xFF:2>
; <o4> Backdoor Key 4 <0x0-0xFF:2>
; <o5> Backdoor Key 5 <0x0-0xFF:2>
; <o6> Backdoor Key 6 <0x0-0xFF:2>
; <o7> Backdoor Key 7 <0x0-0xFF:2>
BackDoorK0 EQU 0xFF
BackDoorK1 EQU 0xFF
BackDoorK2 EQU 0xFF
BackDoorK3 EQU 0xFF
BackDoorK4 EQU 0xFF
BackDoorK5 EQU 0xFF
BackDoorK6 EQU 0xFF
BackDoorK7 EQU 0xFF
; </h>
; <h> FPROT
; P-Flash Protection Register
; <o.7> FPOPEN
; <0=> FPHDIS and FPLDIS bits define unprotected address ranges as specified by the corresponding FPHS and FPLS bits FPROT1.1
; <1=> FPHDIS and FPLDIS bits enable protection for the address range specified by the corresponding FPHS and FPLS bits
; <o.5> FPHDIS
; <0=> Protection/Unprotection enabled
; <1=> Protection/Unprotection disabled
; <o.3..4> FPHS
; <0=> Address range: 0x00_7C00-0x00_7FFF; protected size: 1 KB
; <1=> Address range: 0x00_7800-0x00_7FFF; protected size: 2 KB
; <2=> Address range: 0x00_7000-0x00_7FFF; protected size: 4 KB
; <3=> Address range: 0x00_6000-0x00_7FFF; protected size: 8 KB
; <o.5> FPLDIS
; <0=> Protection/Unprotection enabled
; <1=> Protection/Unprotection disabled
; <o.3..4> FPLS
; <0=> Address range: 0x00_0000-0x00_07FF; protected size: 2 KB
; <1=> Address range: 0x00_0000-0x00_0FFF; protected size: 4 KB
; <2=> Address range: 0x00_0000-0x00_1FFF; protected size: 8 KB
; <3=> Address range: 0x00_0000-0x00_3FFF; protected size: 16 KB
FPROT EQU 0xFF
; </h>
; </h>
; <h> Flash security byte (FSEC)
; WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled",
; MCU's security status cannot be set back to unsecure state since Mass erase via the debugger is blocked !!!
; <o.0..1> SEC
; <2=> MCU security status is unsecure
; <3=> MCU security status is secure
; Flash Security
; This bits define the security state of the MCU.
; <o.6..7> KEYEN
; <2=> Backdoor key access enabled
; <3=> Backdoor key access disabled
; Backdoor key Security Enable
; These bits enable and disable backdoor key access to the FTFL module.
FSEC EQU 0xFE
; </h>
; <h> Flash Option Register (FOPT)
FOPT EQU 0xFE
; </h>
IF :LNOT::DEF:RAM_TARGET
AREA |.ARM.__at_0x400|, CODE, READONLY
DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3
DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7
DCB 0xFF, 0xFF, 0xFF, 0xFF
DCB 0xFF, FPROT, FSEC, FOPT
ENDIF
AREA |.text|, CODE, READONLY
;init_data_bss
; User defined function for data and bs memory segment initialization.
; Weak definition to be replaced by user code.
init_data_bss PROC
EXPORT init_data_bss [WEAK]
BX R14
ENDP
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =init_data_bss
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT Reserved16_IRQHandler [WEAK]
EXPORT Reserved17_IRQHandler [WEAK]
EXPORT Reserved18_IRQHandler [WEAK]
EXPORT Reserved19_IRQHandler [WEAK]
EXPORT Reserved20_IRQHandler [WEAK]
EXPORT FTMRE_IRQHandler [WEAK]
EXPORT PMC_IRQHandler [WEAK]
EXPORT IRQ_IRQHandler [WEAK]
EXPORT I2C0_IRQHandler [WEAK]
EXPORT I2C1_IRQHandler [WEAK]
EXPORT SPI0_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT UART0_IRQHandler [WEAK]
EXPORT UART1_IRQHandler [WEAK]
EXPORT UART2_IRQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT ACMP0_IRQHandler [WEAK]
EXPORT FTM0_IRQHandler [WEAK]
EXPORT FTM1_IRQHandler [WEAK]
EXPORT FTM2_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT ACMP1_IRQHandler [WEAK]
EXPORT PIT_CH0_IRQHandler [WEAK]
EXPORT PIT_CH1_IRQHandler [WEAK]
EXPORT KBI0_IRQHandler [WEAK]
EXPORT KBI1_IRQHandler [WEAK]
EXPORT Reserved42_IRQHandler [WEAK]
EXPORT ICS_IRQHandler [WEAK]
EXPORT WDOG_IRQHandler [WEAK]
EXPORT PWT_IRQHandler [WEAK]
EXPORT MSCAN_RX_IRQHandler [WEAK]
EXPORT MSCAN_TX_IRQHandler [WEAK]
EXPORT DefaultISR [WEAK]
Reserved16_IRQHandler
Reserved17_IRQHandler
Reserved18_IRQHandler
Reserved19_IRQHandler
Reserved20_IRQHandler
FTMRE_IRQHandler
PMC_IRQHandler
IRQ_IRQHandler
I2C0_IRQHandler
I2C1_IRQHandler
SPI0_IRQHandler
SPI1_IRQHandler
UART0_IRQHandler
UART1_IRQHandler
UART2_IRQHandler
ADC_IRQHandler
ACMP0_IRQHandler
FTM0_IRQHandler
FTM1_IRQHandler
FTM2_IRQHandler
RTC_IRQHandler
ACMP1_IRQHandler
PIT_CH0_IRQHandler
PIT_CH1_IRQHandler
KBI0_IRQHandler
KBI1_IRQHandler
Reserved42_IRQHandler
ICS_IRQHandler
WDOG_IRQHandler
PWT_IRQHandler
MSCAN_RX_IRQHandler
MSCAN_TX_IRQHandler
DefaultISR
B .
ENDP
ALIGN
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END

复制代码

小恩GG · 发表于 2020-7-7 10:10:01

yaomeng0725 发表于 2020-7-7 09:33

把vectors.c文件移除，再编译看看

yaomeng0725 · 发表于 2020-7-7 10:36:27

小恩GG 发表于 2020-7-7 10:10
把vectors.c文件移除，再编译看看

不行，程序运行不起来。电流值是原来的一半。我还有段这个程序

/******************************************************************************
*
* Freescale Semiconductor Inc.
*
***************************************************************************
*
* THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESSED OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL FREESCALE OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
***************************************************************************//*!
*
* @file isr.h
*
* @author Freescale
*
* @version 0.0.1
*
* @date Jun. 25, 2013
*
* @brief define interrupt service routines referenced by the vector table.
*
* Note: Only "vectors.c" should include this header file.
*
*******************************************************************************
******************************************************************************/
#ifndef __ISR_H
#define __ISR_H
/* Example */
/*
#undef VECTOR_036
#define VECTOR_036 RTC_Isr
// ISR(s) are defined in your project directory.
extern void RTC_Isr(void);
*/
/*!
* @brief define interrupt service routine for different vectors.
*
*/
/*
#undef VECTOR_023
#define VECTOR_023 IRQ_Isr
*/
#undef VECTOR_036
#define VECTOR_036 RTC_Isr
#undef VECTOR_041
#define VECTOR_041 KBI1_Isr
#undef VECTOR_046
#define VECTOR_046 MSCAN_RxIsr /*!< Vector 36 points to RTC interrupt service routine */
//#undef VECTOR_047
//#define VECTOR_047 MSCAN_TxIsr /*!< Vector 36 points to RTC interrupt service routine */
extern void KBI1_Isr(void);
extern void RTC_Isr(void);
//extern void IRQ_Isr(void);
extern void MSCAN_RxIsr( void );
//extern void MSCAN_TxIsr( void );
#endif //__ISR_H
/* End of "isr.h" */

复制代码

yaomeng0725 · 发表于 2020-7-7 12:17:56

小恩GG 发表于 2020-7-7 10:10
把vectors.c文件移除，再编译看看

#define VECTOR_000 (pointer*)0x20003000

这样修改后，看门狗的动作不起作用，程序会自动重启。CAN接收中断正常工作。RTC正常工作，

小恩GG · 发表于 2020-7-7 13:08:18

yaomeng0725 发表于 2020-7-7 12:17
#define VECTOR_000 (pointer*)0x20003000

这样修改后，看门狗的动作不起作用，程序会自动重启。C ...

勾选这个再试试，我用这个编译过去了

yaomeng0725 · 发表于 2020-7-7 13:20:32

小恩GG 发表于 2020-7-7 13:08
勾选这个再试试，我用这个编译过去了

看门狗的喂狗动作不起作用，程序会自动重启。原程序是好的。

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