FlexIO PWM 输出频率变化不规律

小恩GG

问题简介：
客户使用RT1020开发项目，需要RT1020按此顺序（300kHz，333kHz，375kHz，400kHz）生成频率变化的PWM，为了实现此目标，客户选择使用FlexIO模块，并且利用PIT生成10Hz的中断来更改输出的PWM频率，所以客户使用evkmimxrt1020_flexio_pwm工程进行验证，却在示波器观察到PWM的频率是在两个频率（333kHz和400kHz或300kHz和375kHz）之间切换，而并非预想中的四个。
当PIT的频率降低到1Hz时，虽然会观察到四个频率会依此出现，但偶尔也会跳过333 kHz。
在测试过程中，示波器上显示的频率改变的时间始终遵循着PIT周期。
具体代码如下：

1. const int Periods[4] = {300000, 333333, 375000, 400000};
   
2. const int DutyCycle[4] = {50, 50, 50, 50};
   
3. int pwmDitheringIdx = 0;
   
4. 
   
5. void PWMModule_InitPWM()
   
6. {
   
7.   // Init mux pin
   
8.   IOMUXC_SetPinMux(IOMUXC_PIN_PAD, 0U);
   
9.   IOMUXC_SetPinConfig(IOMUXC_PIN_PAD, 0x10B0u);
   
10.   
    
11.   // Init flexio
    
12.   CLOCK_SetMux(kCLOCK_Flexio1Mux, 3); // Select USB1 PLL CLK
    
13.   CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
    
14.   CLOCK_SetDiv(kCLOCK_Flexio1Div, 1);
    
15.   
    
16.   flexio_config_t fxioUserConfig;
    
17.   FLEXIO_GetDefaultConfig(&fxioUserConfig);
    
18.   fxioUserConfig.enableFastAccess = true;
    
19.   FLEXIO_Init(PWM_FLEXIO, &fxioUserConfig);
    
20.   
    
21.   flexio_timer_config_t fxioTimerConfig;
    
22.   fxioTimerConfig.triggerSelect   = FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(0U);
    
23.   fxioTimerConfig.triggerSource   = kFLEXIO_TimerTriggerSourceInternal;
    
24.   fxioTimerConfig.triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveLow;
    
25.   fxioTimerConfig.pinConfig       = kFLEXIO_PinConfigOutput;
    
26.   fxioTimerConfig.pinPolarity     = kFLEXIO_PinActiveHigh;
    
27.   fxioTimerConfig.pinSelect       = PWM_PIN; /* Set pwm output */
    
28.   fxioTimerConfig.timerMode       = kFLEXIO_TimerModeDisabled;
    
29.   fxioTimerConfig.timerOutput     = kFLEXIO_TimerOutputOneNotAffectedByReset;
    
30.   fxioTimerConfig.timerDecrement  = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput;
    
31.   fxioTimerConfig.timerDisable    = kFLEXIO_TimerDisableNever;
    
32.   fxioTimerConfig.timerEnable     = kFLEXIO_TimerEnabledAlways;
    
33.   fxioTimerConfig.timerReset      = kFLEXIO_TimerResetNever;
    
34.   fxioTimerConfig.timerStart      = kFLEXIO_TimerStartBitDisabled;
    
35.   fxioTimerConfig.timerStop       = kFLEXIO_TimerStopBitDisabled;
    
36.   fxioTimerConfig.timerCompare = computeTimerCompare(frequency, dutyCycle);
    
37.   FLEXIO_SetTimerConfig(PWM_FLEXIO, 0, &fxioTimerConfig);
    
38. 
    
39.   // Init Timer
    
40.   PIT_SetTimerPeriod(PIT, kPIT_Chnl_1, (24000000 / DITHERING_FREQUENCY) - 1);
    
41.   PIT_EnableInterrupts(PIT, kPIT_Chnl_1, kPIT_TimerInterruptEnable);
    
42.   EnableIRQ(PIT_IRQn);
    
43. }
    
44. 
    
45. void PIT_IRQHandler(void)
    
46. {
    
47.   // Stop pwm
    
48.   PWM_FLEXIO->TIMCTL[0] &= 0xFFFFFFFC;
    
49.   // Update the frequency of the flexio.
    
50.   PWM_FLEXIO->TIMCMP[0] = FLEXIO_TIMCMP_CMP(computeTimerCompare(Periods[pwmDitheringIdx], DutyCycle[pwmDitheringIdx]));
    
51.   
    
52.   // Start pwm
    
53.   PWM_FLEXIO->TIMCTL[0] |= FLEXIO_TIMCTL_TIMOD(kFLEXIO_TimerModeDual8BitPWM);
    
54.   
    
55.   pwmDitheringIdx = (pwmDitheringIdx + 1) % NUMBER_OF_FREQUENCY;
    
56.   
    
57.   // Clear IRQ flags
    
58.   PIT_ClearStatusFlags(PIT, kPIT_Chnl_1, kPIT_TimerFlag);
    
59. }
    
60. 
    
61. int computeTimerCompare(unsigned int frequency, unsigned int dutyCycle)
    
62. {
    
63.   //The clock of the FLEXIO Timer[0] is the PLL3 (USB1) clock divided by the predivisor+1 (4+1) and the divisor (7+1)
    
64.   //The number of timer count (sum) required to generate the desired period is Timer[0]_Clock/[Desired Frequency]
    
65.   unsigned int sum = ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / (1 + 1U) / (1 + 1U)) * 2 / frequency + 1) / 2;        //...*2+1)/2 -> Round to nearest
    
66.   
    
67.   //In 8-bit PWM high mode, the lower 8-bits configure the high period of the output to (CMP[7:0] + 1) and
    
68.   //the upper 8-bits configure the low period of the output to (CMP[15:8] + 1).
    
69.   //low/high period is the number of timer count where to output is low/high.
    
70.   //PWM output is hardware inverted...
    
71.   unsigned int lowerValue = (sum * dutyCycle / 50 + 1) / 2;
    
72.   unsigned int upperValue = sum - lowerValue;
    
73.   return ((upperValue -1) <<  | (lowerValue - 1);
    
74. }

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问题解决：
分析上述描述，可得PIT中断周期的长短可能是主要原因，而为了更好的观测波形变化规律，小编使用逻辑分析仪而不是示波器来观察PWM波，确实复现了客户所说的现象。
在经过多次测试和代码浏览后发现，此现象是跟PIT中断函数未及时清零中断符号位有关，CPU时钟频率相比于IP总线时钟要大得多，CPU可能会在清除中断标志之前就已运行完中断处理程序了，从而导致CPU一次又一次进入处理程序。
所以需要在进入PIT中断函数后，跟着调用PIT_ClearStatusFlags(PIT, kPIT_Chnl_1, kPIT_TimerFlag);来清零中断符号位或者在上述函数调用后，执行_DSB()以保证在退出中断函数之前，中断符号位已清零，具体实现代码可参考如下。

1. /*
   
2. * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc.
   
3. * Copyright 2016-2017 NXP
   
4. * All rights reserved.
   
5. *
   
6. * SPDX-License-Identifier: BSD-3-Clause
   
7. */
   
8. 
   
9. #include "fsl_device_registers.h"
   
10. #include "fsl_debug_console.h"
    
11. #include "fsl_flexio.h"
    
12. #include "board.h"
    
13. #include "fsl_pit.h"
    
14. 
    
15. #include "pin_mux.h"
    
16. #include "clock_config.h"
    
17. /*******************************************************************************
    
18. * Definitions
    
19. ******************************************************************************/
    
20. #define DEMO_TIME_DELAY_FOR_DUTY_CYCLE_UPDATE (2000000U)
    
21. #define DEMO_FLEXIO_BASEADDR FLEXIO1
    
22. #define DEMO_FLEXIO_OUTPUTPIN (5U) /* Select FLEXIO1_FLEXIO05 as PWM output */
    
23. #define DEMO_FLEXIO_TIMER_CH (0U)  /* Flexio timer0 used */
    
24. 
    
25. /* Select USB1 PLL (480 MHz) as flexio clock source */
    
26. #define FLEXIO_CLOCK_SELECT (3U)
    
27. /* Clock pre divider for flexio clock source */
    
28. #define FLEXIO_CLOCK_PRE_DIVIDER (4U)
    
29. /* Clock divider for flexio clock source */
    
30. #define FLEXIO_CLOCK_DIVIDER (7U)
    
31. #define DEMO_FLEXIO_CLOCK_FREQUENCY \
    
32.     (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / (FLEXIO_CLOCK_PRE_DIVIDER + 1U) / (FLEXIO_CLOCK_DIVIDER + 1U))
    
33. /* FLEXIO output PWM frequency */
    
34. #define DEMO_FLEXIO_FREQUENCY (48000U)
    
35. #define FLEXIO_MAX_FREQUENCY (DEMO_FLEXIO_CLOCK_FREQUENCY / 2U)
    
36. #define FLEXIO_MIN_FREQUENCY (DEMO_FLEXIO_CLOCK_FREQUENCY / 256U)
    
37. 
    
38. /* Get source clock for PIT driver */
    
39. #define PIT_SOURCE_CLOCK CLOCK_GetFreq(kCLOCK_OscClk)
    
40. /*******************************************************************************
    
41. * Prototypes
    
42. ******************************************************************************/
    
43. /*!
    
44. * @brief Configures the timer as a 8-bits PWM mode to generate the PWM waveform
    
45. *
    
46. * @param freq_Hz PWM frequency in hertz, range is [FLEXIO_MIN_FREQUENCY, FLEXIO_MAX_FREQUENCY]
    
47. * @param duty Specified duty in unit of %, with a range of [1, 99]
    
48. */
    
49. static void flexio_pwm_init(uint32_t freq_Hz, uint32_t duty);
    
50. 
    
51. /*!
    
52. * @brief Enables the timer by setting TIMOD to 8-bits PWM and start generating the PWM
    
53. */
    
54. static void flexio_pwm_start(void);
    
55. 
    
56. /*******************************************************************************
    
57. * Variables
    
58. *******************************************************************************/
    
59. unsigned int idx = 0;
    
60. uint32_t freq[4] = {50000,48000,300000,400000};
    
61. /*******************************************************************************
    
62. * Code
    
63. ******************************************************************************/
    
64. static void flexio_pwm_init(uint32_t freq_Hz, uint32_t duty)
    
65. {
    
66.     assert((freq_Hz < FLEXIO_MAX_FREQUENCY) && (freq_Hz > FLEXIO_MIN_FREQUENCY));
    
67. 
    
68.     uint32_t lowerValue = 0; /* Number of clock cycles in high logic state in one period */
    
69.     uint32_t upperValue = 0; /* Number of clock cycles in low logic state in one period */
    
70.     uint32_t sum        = 0; /* Number of clock cycles in one period */
    
71.     flexio_timer_config_t fxioTimerConfig;
    
72. 
    
73.     /* Check parameter */
    
74.     if ((duty > 99) || (duty == 0))
    
75.     {
    
76.         duty = 50;
    
77.     }
    
78. 
    
79.     /* Configure the timer DEMO_FLEXIO_TIMER_CH for generating PWM */
    
80.     fxioTimerConfig.triggerSelect   = FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(0U);
    
81.     fxioTimerConfig.triggerSource   = kFLEXIO_TimerTriggerSourceInternal;
    
82.     fxioTimerConfig.triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveLow;
    
83.     fxioTimerConfig.pinConfig       = kFLEXIO_PinConfigOutput;
    
84.     fxioTimerConfig.pinPolarity     = kFLEXIO_PinActiveHigh;
    
85.     fxioTimerConfig.pinSelect       = DEMO_FLEXIO_OUTPUTPIN; /* Set pwm output */
    
86.     fxioTimerConfig.timerMode       = kFLEXIO_TimerModeDisabled;
    
87.     fxioTimerConfig.timerOutput     = kFLEXIO_TimerOutputOneNotAffectedByReset;
    
88.     fxioTimerConfig.timerDecrement  = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput;
    
89.     fxioTimerConfig.timerDisable    = kFLEXIO_TimerDisableNever;
    
90.     fxioTimerConfig.timerEnable     = kFLEXIO_TimerEnabledAlways;
    
91.     fxioTimerConfig.timerReset      = kFLEXIO_TimerResetNever;
    
92.     fxioTimerConfig.timerStart      = kFLEXIO_TimerStartBitDisabled;
    
93.     fxioTimerConfig.timerStop       = kFLEXIO_TimerStopBitDisabled;
    
94. 
    
95.     /* Calculate timer lower and upper values of TIMCMP */
    
96.     /* Calculate the nearest integer value for sum, using formula round(x) = (2 * floor(x) + 1) / 2 */
    
97.     /* sum = DEMO_FLEXIO_CLOCK_FREQUENCY / freq_H */
    
98. 
    
99.     sum = (DEMO_FLEXIO_CLOCK_FREQUENCY * 2 / freq_Hz + 1) / 2;
    
100.     PRINTF("\r\n freq_Hz is %d,sum is %d\r\n",freq_Hz,sum);
     
101.     /* Calculate the nearest integer value for lowerValue, the high period of the pwm output */
     
102.     /* lowerValue = sum * duty / 100 */
     
103.     lowerValue = (sum * duty / 50 + 1) / 2;
     
104.     /* Calculate upper value, the low period of the pwm output */
     
105.     upperValue                   = sum - lowerValue;
     
106.     fxioTimerConfig.timerCompare = ((upperValue - 1) << 8U) | (lowerValue - 1);
     
107.     PRINTF("\r\n fxioTimerConfig.timerCompare is %d\r\n",fxioTimerConfig.timerCompare);
     
108. 
     
109.     FLEXIO_SetTimerConfig(DEMO_FLEXIO_BASEADDR, DEMO_FLEXIO_TIMER_CH, &fxioTimerConfig);
     
110. 
     
111. }
     
112. 
     
113. static void flexio_pwm_start(void)
     
114. {
     
115.     /* Set Timer mode to kFLEXIO_TimerModeDual8BitPWM to start timer */
     
116.     DEMO_FLEXIO_BASEADDR->TIMCTL[DEMO_FLEXIO_TIMER_CH] |= FLEXIO_TIMCTL_TIMOD(kFLEXIO_TimerModeDual8BitPWM);
     
117. }
     
118. 
     
119. /*!
     
120. * @brief Main function
     
121. */
     
122. int main(void)
     
123. {
     
124.     uint32_t i;
     
125.     uint32_t duty = 100;
     
126.     flexio_config_t fxioUserConfig;
     
127. 
     
128.     /* Init board hardware */
     
129.     BOARD_ConfigMPU();
     
130.     BOARD_InitPins();
     
131.     BOARD_BootClockRUN();
     
132.     BOARD_InitDebugConsole();
     
133. 
     
134.     /* Clock setting for Flexio */
     
135.     CLOCK_SetMux(kCLOCK_Flexio1Mux, FLEXIO_CLOCK_SELECT);
     
136.     CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, FLEXIO_CLOCK_PRE_DIVIDER);
     
137.     CLOCK_SetDiv(kCLOCK_Flexio1Div, FLEXIO_CLOCK_DIVIDER);
     
138. 
     
139.     /* Init flexio, use default configure
     
140.      * Disable doze and fast access mode
     
141.      * Enable in debug mode
     
142.      */
     
143.     FLEXIO_GetDefaultConfig(&fxioUserConfig);
     
144.     FLEXIO_Init(DEMO_FLEXIO_BASEADDR, &fxioUserConfig);
     
145. 
     
146.     // Init Timer
     
147.     CLOCK_SetMux(kCLOCK_PerclkMux, 1U); // Take the osc clock source 24MHz
     
148.     CLOCK_SetDiv(kCLOCK_PerclkDiv, 0U); // divide the clock by 1
     
149.     pit_config_t pitConfig;
     
150.     PIT_GetDefaultConfig(&pitConfig);
     
151.     PIT_Init(PIT, &pitConfig);
     
152.     PIT_SetTimerPeriod(PIT, kPIT_Chnl_1, USEC_TO_COUNT(1000000U, PIT_SOURCE_CLOCK));
     
153.     PIT_EnableInterrupts(PIT, kPIT_Chnl_1, kPIT_TimerInterruptEnable);
     
154.     EnableIRQ(PIT_IRQn);
     
155.     PIT_StartTimer(PIT, kPIT_Chnl_1);
     
156. 
     
157.     PRINTF("\r\nFLEXIO_PWM demo start.\r\n");
     
158.     flexio_pwm_init(freq[idx], 50);
     
159.     flexio_pwm_start();
     
160.     while (1)
     
161.     {
     
162. //        flexio_pwm_init(DEMO_FLEXIO_FREQUENCY, --duty);
     
163. //        flexio_pwm_start();
     
164. 
     
165. //        for (i = 0; i < DEMO_TIME_DELAY_FOR_DUTY_CYCLE_UPDATE; i++)
     
166. //        {
     
167. //            __NOP();
     
168. //        }
     
169. 
     
170. //        if (duty == 0)
     
171. //        {
     
172. //            duty = 100;
     
173. //        }
     
174.     }
     
175. }
     
176. 
     
177. 
     
178. 
     
179. 
     
180. void PIT_IRQHandler(void)
     
181. {
     
182.   PIT_ClearStatusFlags(PIT, kPIT_Chnl_1, kPIT_TimerFlag);
     
183.   idx = (idx + 1) % 4;
     
184.   PRINTF("\r\n idx is %d\r\n",idx);
     
185.   flexio_pwm_init(freq[idx], 50);
     
186.   flexio_pwm_start();
     
187. 
     
188.   /* Added for, and affects, all PIT handlers. For CPU clock which is much larger than the IP bus clock,
     
189.    * CPU can run out of the interrupt handler before the interrupt flag being cleared, resulting in the
     
190.    * CPU's entering the handler again and again. Adding DSB can prevent the issue from happening.
     
191.    */
     
192.   //__DSB();
     
193. }

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爱喝柠檬水

请问下这个案例的PWM输出频率能降低到1K以下吗，我测试了好像不行