LPC828 的DMA传输字节限制问题

eefocus_3714880 · 发表于 2021-10-22 16:51:29

本帖最后由小恩GG 于 2021-11-11 16:15 编辑

由于我需要通过SPI串口给灯带传输RGB值，一共有５４个灯珠。刷新一次灯珠值需要５４＊２４＝１２９６个字节，但是DMA好像最大只能传输1KB；不知道如何能够一次传输1296字节；求大佬解答；目前我还没有玩过NXP芯片；
下面是代码：
static bool dmaTXSend(uint16_t *data, int bytes)
{
      /* Disable the DMA IRQ to prevent race conditions with shared data */
      NVIC_DisableIRQ(DMA_IRQn);

      /* This is a limited example, limit descriptor and byte count */
      if ((countTXDescUsed >= SPITXDESC) || (bytes > 1296)) {
            /* Re-enable the DMA IRQ */
            NVIC_EnableIRQ(DMA_IRQn);

            /* All DMA descriptors are used, so just exit */
            return false;
      }
      else if (countTXDescUsed == 0) {
            /* No descriptors are currently used, so take the first one */
            nextTXDesc = 0;
      }

      /* This is a limited example, limit descriptor and byte count */
      if ((countTXDescUsed2 >= SPITXDESC) || (bytes > 1296)) {
            /* Re-enable the DMA IRQ */
            NVIC_EnableIRQ(DMA_IRQn);

            /* All DMA descriptors are used, so just exit */
            return false;
      }
      else if (countTXDescUsed2 == 0) {
            /* No descriptors are currently used, so take the first one */
            nextTXDesc2 = 0;
      }

      /* Create a descriptor for the data */
      dmaTXDesc[countTXDescUsed].source = DMA_ADDR(data + bytes - 1);       /* Last address here */
      dmaTXDesc[countTXDescUsed].dest = DMA_ADDR(&LPC_SPI0->TXDAT);       /* 2Byte aligned */

      /* Create a descriptor for the data */
      dmaTXDesc2[countTXDescUsed2].source = DMA_ADDR(data + bytes - 1);       /* Last address here */
      dmaTXDesc2[countTXDescUsed2].dest = DMA_ADDR(&LPC_SPI1->TXDAT);       /* 2Byte aligned */

      /* If there are multiple buffers with non-contiguous addresses, they can be chained
         together here (it is recommended to only use the DMA_XFERCFG_SETINTA on the
         last chained descriptor). If another TX buffer needs to be sent, the DMA
         IRQ handler will re-queue and send the buffer there without using chaining. */
      dmaTXDesc[countTXDescUsed].next = DMA_ADDR(0);

      dmaTXDesc2[countTXDescUsed2].next = DMA_ADDR(0);

      /* Setup transfer configuration */
      dmaTXDesc[countTXDescUsed].xfercfg = DMA_XFERCFG_CFGVALID | DMA_XFERCFG_SETINTA |
                                                                              DMA_XFERCFG_SWTRIG | DMA_XFERCFG_WIDTH_16 | DMA_XFERCFG_SRCINC_1 |
                                                                              DMA_XFERCFG_DSTINC_0 | DMA_XFERCFG_XFERCOUNT(bytes);

      dmaTXDesc2[countTXDescUsed2].xfercfg = DMA_XFERCFG_CFGVALID | DMA_XFERCFG_SETINTA |
                                                                              DMA_XFERCFG_SWTRIG | DMA_XFERCFG_WIDTH_16 | DMA_XFERCFG_SRCINC_1 |
                                                                              DMA_XFERCFG_DSTINC_0 | DMA_XFERCFG_XFERCOUNT(bytes);

      /* If a transfer is currently in progress, then stop here and let the DMA
         handler re-queue the next transfer. Otherwise, start the transfer here. */
      if (countTXDescUsed == 0) {
            /* Setup transfer descriptor and validate it */
            Chip_DMA_SetupTranChannel(LPC_DMA, DMAREQ_SPI0_TX, &dmaTXDesc[countTXDescUsed]);

            /* Setup data transfer */
            Chip_DMA_SetupChannelTransfer(LPC_DMA, DMAREQ_SPI0_TX,
                                                                        dmaTXDesc[countTXDescUsed].xfercfg);

            Chip_DMA_SetValidChannel(LPC_DMA, DMAREQ_SPI0_TX);
//             Chip_DMA_SetTrigChannel(LPC_DMA, DMAREQ_SPI0_TX);
      }

      if (countTXDescUsed2 == 0) {
            /* Setup transfer descriptor and validate it */
            Chip_DMA_SetupTranChannel(LPC_DMA, DMAREQ_SPI1_TX, &dmaTXDesc2[countTXDescUsed2]);

            /* Setup data transfer */
            Chip_DMA_SetupChannelTransfer(LPC_DMA, DMAREQ_SPI1_TX,
                                                                        dmaTXDesc2[countTXDescUsed2].xfercfg);

            Chip_DMA_SetValidChannel(LPC_DMA, DMAREQ_SPI1_TX);
//             Chip_DMA_SetTrigChannel(LPC_DMA, DMAREQ_SPI1_TX);
      }

      /* Update used descriptor count */
      countTXDescUsed++;

      countTXDescUsed2++;

      /* Re-enable the DMA IRQ */
      NVIC_EnableIRQ(DMA_IRQn);

      return true;
}