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发表于 2009-12-11 23:12:00
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回复:MCF52233_CFM
<div style="border-right: #ccc 1px dashed; padding-right: 5px; border-top: #ccc 1px dashed; padding-left: 5px; padding-bottom: 5px; border-left: #ccc 1px dashed; padding-top: 5px; border-bottom: #ccc 1px dashed">回复第 7 楼 fishandbear于2009-12-11 05:40:30发表:
初始化这里,首先MCF_CFM_CFMCLKD_PRDIV8要在总线频率大于12.8M的时候才置位。
其次fclk_val = (unsigned char)(FlashClk/8/200-1);不够严谨。
datasheet里面有下面这段话
For frequencies of the input clock greater than 12.8 MHz, the CFMCLKD bit PRDIV8 must be set.
CFMCLKD DIV bit field must be chosen such that the following equation is valid:
If PRDIV8 == 1 then FCLK = input clock / 8, else FCLK = input clock
If (FCLK[KHz] / 200KHz) is integer then DIV = (FCLK[KHz] / 200KHz) - 1,
else DIV = INT (FCLK[KHz] / 200kHz)
FCLK, the clock to the flash block timing control, is therefore:
FCLK = (input clock) / (DIV + 1)
150KHz < FCLK |
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